debian for riscv open source hardware

News and discussion about development of the Debian OS itself

Re: debian for riscv open source hardware

Postby tomazzi » 2016-08-29 21:16

hthi wrote:The riscv isa is open source. No one can make it closed source or demand license fees. A manufacture can or cannot decide to close derivatives. Consumers decide if they want to buy it. Any entity can manufacture a riscv fsf approved device. About arm and intel you cannot make that decision by yourself. Arm or intel has to approve which they do not. According to my information.


Nope, things are a bit different, and this particular topic apparently (again) needs an explanation:
The ARM Holdings/Intel/etc. are selling/licensing the implementation of the ISA, that is, the specifications, code and schematics for the microarchitecture - which means that they are selling/licensing the hardware-based interpreters.

Both the ARM and x86 ISA specifications are open/free (like in freedom) - anyone can build his own ARM or x86 CPU without buying a license. This is also true for CPU emulators, like Softgun or QEMU f.e.

Among other things, and for the above reasons, I can't find anything which is making the RISC-V exceptional/revolutionary.
I suppose that there can be other reasons, but for sure this is not about licensing...

Regards.
Odi profanum vulgus
tomazzi
 
Posts: 730
Joined: 2013-08-02 21:33

Re: debian for riscv open source hardware

Postby pylkko » 2016-08-30 08:49

Your attitude seems to be a bit condescending when you say things like “apparently this needs to be explained again”, while at the same time the only one making strong claims in this thread is you, and apparently your “explaining” is not working. So when you are asked specificities over what you mean, you decline to answer, but then you "get angry" because your "people don't get your point"??

I think it is interesting that the Wikipedia article portrays the two (ARM vs RISCV) in such a contrastive manner. One would think that they are from entirely different universes. Yet you seem to think that they are “essentially the same”. This is interesting and you would think that it would open up some new opinions or views or alternative ways to look at the same thing. However, you refuse to comment the Wikipedia article. I don’t understand why you would do this?

I don’t know… you say that ARM is “selling/licensing the hardware-based interpreters” and that “anyone can build his own ARM or x86 CPU without buying a license”. Now correct me if I’m wrong, but even if it is true that anyone can build an ARM processor, you certainly cannot sell ARM processors or products containing the processors without paying both the license and royalties on every chip that you sell.

According to this article “How ARM makes money”.
http://www.anandtech.com/show/7112/the-arm-diaries-part-1-how-arms-business-model-works/2 wrote:There are two amounts that all ARM licensees have to pay: an upfront license fee, and a royalty.

and:
The upfront license fee depends on the complexity of the design you’re licensing. An older ARM11 will have a lower up front fee than a Cortex A57. The upfront fee generally ranges from $1M - $10M, although there are options lower or higher than that (I’ll get to that shortly).
The royalty is on a per chip basis. Every chip that contains ARM IP has a royalty associated with it. The royalty is typically 1 - 2% of the selling price of the chip.


Now I don't want to get all confrontational about it, but if I am getting this right it does appear that RISCV is very different from ARM.


Wikipedia:
Significance
The RISC-V authors aim to provide several CPU designs freely available under a BSD license. Such licenses allow derivative works, such as RISC-V chip designs, to be either open and free, like RISC-V itself, or closed and proprietary. This is unlike the alternative OpenRISC cores, which under the GPL license, requires derivative works to be open.

By contrast, commercial chip vendors such as ARM Holdings and MIPS Technologies charge substantial license fees for the use of their patents.[8] They also require non-disclosure agreements before releasing documents that describe their designs' advantages and instruction set. Many design advances are completely proprietary, never described even to customers. The secrecy interferes with legitimate public educational use, security auditing, and the development of public, low–cost free and open-source software compilers, and operating systems.

Developing a CPU requires design expertise in several specialties: electronic logic, compilers, and operating systems. It's rare to find this outside of a professional engineering team. The result is that modern, high-quality general-purpose computer instruction sets have not recently been widely available anywhere, or even explained, except in academic settings. Because of this, many RISC-V contributors see it as a unified community effort. This need for a large base of contributors is part of the reason why RISC-V was engineered to fit so many uses.

The RISC-V authors also have substantial research and user-experience validating their designs in silicon and simulation. The RISC-V ISA is a direct development from a series of academic computer-design projects. It was originated in part to aid such projects.[3][9]
User avatar
pylkko
 
Posts: 966
Joined: 2014-11-06 19:02

Re: debian for riscv open source hardware

Postby tomazzi » 2016-08-30 15:50

Apparently You've missed the fact, that in my previous post I've just showed 2 examples of open and free implementations of the ARM ISA (Softgun and QEMU).

Most of what You said is true, but the wiki resources are talking about the proprietary extensions and about the hardware implementations - and that's exactly what I mean in regard to RISC-V.

RISC-V has the open part, but most likely it'll contain proprietary extensions and closed hardware.
If You think that I'm wrong, please explain why they are guaranteeing support for proprietary extensions?

For me this is obvious: RISC-V ISA is just nothing special, and for me this is all about creating a cheaper alternative to ARM.

Regards.
Odi profanum vulgus
tomazzi
 
Posts: 730
Joined: 2013-08-02 21:33

Re: debian for riscv open source hardware

Postby pylkko » 2016-08-30 17:22

I don't think you are wrong. I wasn't sure what you were trying to say. It looked like you were saying that RISC-V is designed so that open platforms are impossible. I didn't understand on what basis you meant that. Now I realize that you are saying that the platform allows for non-open and nonfree stuff, (and maybe also that you believe that if non-open stuff is allowed, then all real implementations in the future will certainly be non-free and proprietary).

So maybe you think that until a platform is published with a GPL kind of basis, which explicitly prohibits any and all commercial and closed derivatives, you will not consider it different in a interesting way. Maybe you think more positively about OpenRISC?

Well, I guess we can say that while it is not perfect, it is better than anything else now? To me it sounds like something truly different from ARM in an interesting way.
User avatar
pylkko
 
Posts: 966
Joined: 2014-11-06 19:02

Re: debian for riscv open source hardware

Postby pylkko » 2016-09-22 19:21

tomazzi wrote:
First, RISC-V is not a product yet - it works only in the simulators (not counting that reference chip, which can be seen only on a photo).

Regards.



I think you might be interested to know. By coincidence I was introduced today to a product described in the link. This was announced as recently as Jul 11, 2016, but they appear to be real existing products with prices cited. I have not looked thoroughly into how "open" they are, other than reading this line from that link "Like RISC-V, both designs are fully open source" whatever that is supposed to mean... since some of the products appear to include other auxiliary harware, for example ARM cores.

https://store.digilentinc.com/arty-boar ... hobbyists/ (price $99)
https://dev.sifive.com/dev-kits/
http://hackerboards.com/first-socs-base ... run-linux/
https://www.arrow.com/en/products/sf2pl ... ment-tools

also, the low risc project is claiming on their FAQ that they expect to be able to produce chips by 2017 that will run for approx 10 USD
User avatar
pylkko
 
Posts: 966
Joined: 2014-11-06 19:02

Re: debian for riscv open source hardware

Postby tomazzi » 2016-09-26 00:30

Thanks for the links - but this is not proving anythig: (the order of links is preserved)

1. Arty is only an FPGA-based CPU emulator.
2. SiFive avoids to say a word about the fact, that they are using an ARM Cortex M3 core (E300/U500)
3. ARM Cortex M3 core in an "free and open source HW"? (E300/U500) - just like the above.
4. Arrow is blocking all the TOR network, but they are stupid enough to advertise the #3 and #2 solutions as an "open HW", while they are not able to even provide correct HW specs: "Maximum Clock Rate (MHz): 0.032/12/25/166" - morons?

Links 2,3 and 4 are referring to a SmartFusion2 solution which have an integrated ARM Cortex M3 core.

hmm... this doesn't look promising...

Anyway, Regards.
Odi profanum vulgus
tomazzi
 
Posts: 730
Joined: 2013-08-02 21:33

Re: debian for riscv open source hardware

Postby pylkko » 2016-09-26 14:14

My understanding is that the only people trying to implement RISC-V now are lowRISC and Sfive, and that the first lowRISC's will probably come without GPU as no open GPU exists. FPGA-emulation is apparently only good for development but the performance is significantly lower (not surprising, given emulation). Also in the news was the there is some "clean, RPM-built, bootable disk images" for Fedora on RISC-V

https://lists.fedoraproject.org/archive ... QZV4RJMQN/
User avatar
pylkko
 
Posts: 966
Joined: 2014-11-06 19:02

Re: debian for riscv open source hardware

Postby pylkko » 2016-12-01 09:14

https://www.crowdsupply.com/sifive/hifive1

http://www.iotconnectivitysolutions.com/news/2016/11/29/8460023.htm wrote:announced the availability of its Freedom Everywhere 310 (FE310) system on a chip (SoC), the industry's first commercially available SoC based on the free and open RISC-V instruction set architecture, along with the corresponding low-cost HiFive1 software development board. As part of this availability, SiFive also has contributed the register-transfer level (RTL) code for FE310 to the open-source community
On Extensions that are supported:

  • RV32I Base Integer Instruction Set, Version 2.0
  • “M” Standard Extension for Integer Multiplication and Division, Version 2.0
  • “A” Standard Extension for Atomic Instructions, Version 2.0
  • “C” Standard Extension for Compressed Instructions, Version 1.9
  • RISC-V Privileged ISA Specification, Version 1.9.1
  • RISC-V External Debug Support, Version 0.11
User avatar
pylkko
 
Posts: 966
Joined: 2014-11-06 19:02

Previous

Return to Debian Development

Who is online

Users browsing this forum: No registered users and 1 guest

fashionable