The first Linux-ready, 64-bit RISC-V SoC

[pylkko]

IT appears that other players in the game are starting to realize that an open ISA will be a big thing. MIPS announces that they will open their ISA:

https://www.phoronix.com/scan.php?page= ... ource-2019

[Head_on_a_Stick]

Interesting blog post:

Building a RISC-V PC

The author uses Fedora but I think Debian testing/unstable can be made to work.

Here is a github repository (also linked in the blog post) that contains all the drivers needed to get the HiFive board working with kernel 4.19-rc2:

https://github.com/westerndigitalcorpor ... C-V-Linux/

[Head_on_a_Stick]

New mini-ITX board from SiFive using their U740 64-bit multi-core RISC-V processor:

https://www.sifive.com/boards/hifive-unmatched

This is a more affordable replacement for the old "Unleashed" board and has M.2 slots for an NVMe drive & wireless card along with an x16 PCIe slot.

Product brief: https://sifive.cdn.prismic.io/sifive/c0 ... sed%29.pdf

EDIT: just by way of comparison the functionality is about the same as the old Unleashed board plus the expansion board, which together retailed for ~$3,000. The Unmatched board has an expected price of $665.

[LE_746F6D617A7A69]

http://forums.debian.net/viewtopic.php?f=19&t=129576&hilit=RISC+V+tomazzi#p623106 (4 years ago)

RISC-V is designed for a purpose - the thing is that only very few people know what the purpose is ...

[pylkko]

You had an argument with nearly everyone on this forum. Then, I remember that you had a bigger one with somebody and left saying that you will never come back, Tomazzi.

[Head_on_a_Stick]

The development and availability of RISC-V implementations will probably accelerate rapidly now that NVIDIA have bought Arm. Hopefully some will be produced without the optional proprietary extensions — there is now a general acceptance that open-source hardware is essential in respect of security and verified chains of trust.

EDIT: see also https://live-risc-v.pantheonsite.io/blo ... on-risc-v/

[LE_746F6D617A7A69]

You had an argument with nearly everyone on this forum. Then, I remember that you had a bigger one with somebody and left saying that you will never come back, Tomazzi.

So ... what's Your problem? ... You don't like the arguments which You can't beat in the discussion or what?

I've joined the forums again only to post a "How to" automate re-clocking with nouveau driver - but somehow it turned out that I'm going to stay here for a longer time ... (but my post counter have started counting from zero, so my "rank" is not as high as Yours - take it ease man )

The development and availability of RISC-V implementations will probably accelerate rapidly now that NVIDIA have bought Arm. Hopefully some will be produced without the optional proprietary extensions — there is now a general acceptance that open-source hardware is essential in respect of security and verified chains of trust.

EDIT: see also https://live-risc-v.pantheonsite.io/blo ... on-risc-v/

The only problem I have with the RISC-V is that it's not a revolutionary project, no matter what aspect You'll choose to judge it on.
Therefore all I want to say is:
a) there's no single technical reason to go for RISC-V
b) the above means that RISC-V was created only for political reasons, not for technical ones.

Regards

[Head_on_a_Stick]

a) there's no single technical reason to go for RISC-V
b) the above means that RISC-V was created only for political reasons, not for technical ones.

I would consider the open-source nature of RISC-V to be a technical advantage — security cannot be guaranteed if the ISA is proprietary.

[LE_746F6D617A7A69]

I would consider the open-source nature of RISC-V to be a technical advantage — security cannot be guaranteed if the ISA is proprietary.

Ehh, so I have to explain it again:
ISA (Instruction Set Architecture) is a *document* which defines a set of special numbers, called operation codes or opcodes for short, which have to be understood by the CPU which conforms to that ISA specification - nothing else, it's just a document.

The ISA document does not define *how* the hardware interpreter is performing the operations defined by opcodes - and therefore it *does not* define how the digital circuits would have to be designed to interpret the opcodes (this is the same situation like in case of AMD and Intel or Broadcom vs Samsung CPUs) - the hardware is still closed.

In addition, the RISC-V ISA *document* (specification) *guarantees* that some specific range of opcode numbers are allowed to be used by some undefined proprietary extensions.

Here's an example what proprietary extensions could mean:
The CPU equipped with proprietary extensions can for example virtualize all the OS-es that are running on it, what allows to bypass all the security measures implemented in that virtualized OS-es.

This means:
a) The closed-source bootloader can virtualize the installed OS-es and allow to access its vital data from the outside world (just like in case of Intel's v-pro)
b) The CPU can have unofficial instructions for bypassing f.e. the MMU - even when the OS is not virtualized by the bootloader, that would allow to access any area of system memory by specially crafted applications, downloaded from google store

[pylkko]

New mini-ITX board from SiFive using their U740 64-bit multi-core RISC-V processor:

https://www.sifive.com/boards/hifive-unmatched

This is a more affordable replacement for the old "Unleashed" board and has M.2 slots for an NVMe drive & wireless card along with an x16 PCIe slot.

Product brief: https://sifive.cdn.prismic.io/sifive/c0 ... sed%29.pdf

EDIT: just by way of comparison the functionality is about the same as the old Unleashed board plus the expansion board, which together retailed for ~$3,000. The Unmatched board has an expected price of $665.

One could speculate, how much should it cost for everyday PC builders to even consider it?

I wonder if the boot process will be entirely open in this new board also? In the old board the M-mode firmware was entirely available on github. And I believe at least the ZSBL ROM could be read from user space (not sure about the rest). H-mode could be done by OpenSBI. Also it had ports for libreboot and U-boot (and even oreboot a libreboot port written in Rust). As far as I know, this guaranteed a entirely open source boot flow from initial ROM initialization to linux (in addition to the entirely open implementation of the ISA in the processor). I think the software/firmware is just as important as the open hardware.

[Head_on_a_Stick]

I wonder if the boot process will be entirely open in this new board also?

Difficult to say at this stage, there is a firmware placeholder on the web page but no link as yet.

[Head_on_a_Stick]

New board from BeagleV:

https://beaglev.seeed.cc/

It will have a dual-core U74 (64-bit RISC-V from SiFive) with a Vision DSP chip for the video outputs. Unfortunately it also has an NVIDIA Deep Learning Accelerator for "AI" applications so that's probably not open source at all but otherwise it looks good and $149 for the 8GiB version is pretty cheap for RISC-V.